Business Xilinx tapes out 20nm product

Business Xilinx tapes out 20nm product

2013/07/10

Xilinx, has taped out its first 20nm device – the first 20nm device in the PLD industry.

“With the industry’s most aggressive 20nm tape-out schedule, I believe Xilinx is much greater than a year ahead of our nearest competition for high-end devices and about a half a year ahead for mid-range devices,” says Victor Peng, Xilinx SVP.

Xilinx has worked with TSMC to infuse high-end FPGA requirements into the TSMC 20SoC development process.

The 20nm part uses Xilinx’s UltraScale architecture developed to scale from 20nm planar, through 16nm and beyond FinFET technologies, and from monolithic through 3D ICs.

UltaScale addresses the limitations to scalability of total system throughput and latency, but attacks the number one bottleneck to chip performance at advanced nodes: the interconnect.

An innovative architectural approach is required to manage multi-hundred gigabit-per-second levels of system performance with smart processing at full line rate, scaling to terabits and teraflops.

The mandate is not simply to increase the performance of each transistor or system block, or scale the number of blocks in the system, but to fundamentally improve the communication, clocking, critical paths, and interconnect to address the massive data flow and real-time packet, DSP, and/or image processing.

The UltraScale architecture addresses these challenges by applying ASIC techniques in a fully programmable architecture.

The initial UltraScale devices will extend the company’s Virtex and Kintex FPGA and 3D IC families and will serve as the foundation for future Zynq SoCs.

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